Pat Gelsinger joins board of Australian chip packaging startup

Pat Gelsinger spent four decades inside chip manufacturing, the last three years of it as Intel CEO. He left in 2024. Now he has joined the board of Syenta, an Australian National University spinout that has raised $26 million to solve one of advanced AI chips' most persistent engineering problems with a metal stamp and some chemistry.

The National Reconstruction Fund, Australia's government-owned investment vehicle, contributed A$10.1 million to the round, putting sovereign capability money behind a bet that university-linked ventures can compete in advanced chip packaging without needing to own a fab first. Playground Global, where Gelsinger is a founding general partner, led the financing.

Syenta's Localized Electrochemical Manufacturing platform uses a metal stamp as a mold for localized copper deposition — essentially printing copper wiring onto the outside of chip packages rather than etching it layer by layer using light. According to Reuters, the company says the process achieves sub-micron interconnect pitch on packages larger than 1,000 mm², takes minutes instead of several hours, and delivers roughly 40 percent fewer steps than conventional approaches. The company states on its website that its interconnects are sub-micron, manufactured on large more than 1,000 mm² packages, and the process has three times the throughput of existing fabs, per Syenta.com. A 2025 technical breakdown cited 12 steps versus 23 for conventional semi-additive processes, with a claimed 70 percent reduction in total cost of ownership. The numbers are company-claimed; no commercial wafers have shipped yet.

The problem Syenta is trying to solve is documented. In the last two decades, processor speeds improved roughly 60 times. Memory bandwidth improved about 100 times. The wiring between them improved only 30 times. That gap — the "memory wall" in industry terms — means that as chipmakers pack more AI accelerators into a single system, more potential performance sits idle waiting for data that cannot move fast enough through the connections, according to 3DInCites. It is a bottleneck that better chip designs cannot fix, because it lives in the packaging that holds those chips together.

Gelsinger's board seat is the part of this story that was not true a year ago. "You open up a much bigger, more standardized, more available supply chain, yet with the density and performance" gains that drove chipmakers toward advanced packaging in the first place, he said in Syenta's announcement. The Arizona office is the tangible bet: Syenta plans to open it near the Intel and TSMC facilities already in the state, a deliberate choice to be where the ecosystem already exists rather than asking chipmakers to change their geography.

Syenta had previously raised $2.2 million in seed funding in 2022 and $8.8 million in a pre-Series A round last August, according to StartupDaily. The company began life as a multi-material 3D printer startup; the pivot to semiconductor packaging came from a frustration cofounder Jekaterina Viktorova traced to 2017, Forbes Australia reported — existing manufacturing approaches had real limits on interconnect density, and nobody had found a way around them that did not require rebuilding fab infrastructure from scratch. Viktorova and cofounder Professor Luke Connal, a materials science expert with two decades in the field, developed Localized Electrochemical Manufacturing as a way to work within existing manufacturing lines rather than replace them.

The Applied Materials ASTRA accelerator selected Syenta in 2024 following a feasibility project, which provides some third-party validation that the underlying physics is not fictional. Early access partners across the semiconductor supply chain are engaged, according to the company. High-volume production is targeted for 2028, Reuters reported.

The counterargument is the one that applies to every university semiconductor spinout: most fail. NRF's A$10.1 million is sovereign capability theater if Australia has no fab to put this in. Gelsinger's board seat is a sales signal from a GP whose fund just led the round. Whether Localized Electrochemical Manufacturing scales past the lab is the question the next three years will answer.

What is genuine is the problem. The memory wall is not a narrative invention — it is documented in the gap between processor and memory bandwidth scaling curves, and it is not solved by another chip design or training approach. Someone has to build the packaging infrastructure to close it. Syenta has a plausible approach and credible institutional backing.