AIBRIEF
DigiTimes reports MediaTek inside a Broadcom dominated program; the v8 split between an 8t training chip and an 8i inference chip is what opened the door.
Google's TPU v8 isn't one chip. It's two: TPU 8t for training, TPU 8i for inference. That split is the mechanism behind a DigiTimes report that MediaTek has secured a design slot inside what read as a Broadcom-only program. DigiTimes frames the win via "three key strengths"; the body is paywalled, so scope, whether design service, co-design, or physical implementation, is not verifiable from the open record.
Inference is the larger workload. A tech-insider recap cites more than 70% of AI accelerator demand now sitting on inference, the lane where specialized design partners can enter. Google's TPU v8 deep dive describes 8t as the larger machine: 9,600 liquid-cooled chips per superpod, 121 FP4 exaflops, roughly three times Ironwood's 42.5 exaflops. 8i opens a different door.
DigiTimes pairs the MediaTek headline with a 10% 2026 growth projection for Taiwan's IC design industry, a trade-press forecast, not an earnings print, and names four co-beneficiaries: GUC and Alchip (ASIC design-service houses), Phison and Silicon Motion (NAND controller specialists). Each has a materially different exposure to the AI capex cycle; lumping them into one "AI winners" group loses that.
Marvell and AMD are circling. TrendForce reports Marvell in a custom-silicon deal with Google and flags AMD as a potential 10th-generation TPU entrant. Both remain rumor-stage. The bifurcation, by contrast, is a Google-confirmed architectural fact, the door the Taiwan design houses are walking through.